A Low Voltage To High Voltage Level Shifter Circuit For Mems Application

Li and bogdan m.

A low voltage to high voltage level shifter circuit for mems application.

The pre driver circuit which generates the pull up and pull down signal is mainly a voltage level shifter circuit. The level shifter often consumes significant power due to high supply voltage and has limited bandwidth due to the low f t of thick oxide high voltage transistors. The design uses a stack of. This approach also requires dual supply voltages.

Conclusion a low voltage to high voltage level shifter circuit for mems application is designed using normal low voltage devices. An inverting buffer stage is connected to a supply voltage and coupled to the input voltage divider s output. The pre driver circuit which generates the pull up and pull down signal is mainly a voltage level shifter circuit. Processing such as delay and frequency control in low voltage domain following by a level shifter to shift up the signal to high voltage domain as illustrated in fig.

High voltage 15 v drivers are integrated into the vlsi chip for mems application with the development of soc technology. Simulation result of the proposed voltage level shifter circuit. The interface of a low voltage and high voltage gates. For a chip level dvs system level shifters are required between core circuits and i o circuits interface where low voltage logic.

10 1109 ugim 2003 1225712 a low voltage to high voltage level shifter circuit for mems application article pan2003alv title a low voltage to high voltage level shifter circuit for mems application author dong pan and harry w. It features zero dc current consumption while reduces internal voltage swing. The simulation result indicates that the magnitude of the vgs. Conventional voltage level shifter circuit using high voltage nmos and high.

The level shifter is a key circuit component in multi voltage circuits and has important implementation 15. The pre driver circuit which generates the pull up and pull down signal is mainly a voltage level shifter circuit. It converts the low voltage control signal to high voltage control signal. Wilamowski journal proceedings of the 15th biennial university government industry microelectronics symposium cat.

A shifter circuit comprises in one embodiment an input voltage divider stage comprising multiple transistors arranged in a transistor stack defining a plurality of intermediate nodes. It converts the low voltage control signal to high voltage control signal. In 12 the authors presented a low to high voltage level shifter for use in a vlsi chip for mems applications.